1. Field of Invention
The present invention relates in general to the technology of fabricating semiconductors, and more particularly to a method for fabricating a mesa sidewall with a spin coated dielectric material.
2. Related Art
High-speed III-V electronic devices have played a key role in broadband communication. They are extensively used in wireless communication equipment, and have proved to be indispensable in the 40 Gb/s optical fiber communication system as well. Recent years witness the ever-growing demand for larger broadband width and higher speed as technology advances. People have started to pay attention to circuits with an operating frequency higher than 300 GHz and the realization of terahertz transistors, as seen applied in wireless communication, security maintenance, biomedical examination, radio frequency signal transmission, radar, high frequency imaging, and etc.
Among the more common III-V compound semiconductors, the system of materials that grows on substrates of gallium arsenide (GaAs) and indium phosphide (InP) are regarded as crucial materials to achieve higher operating frequencies because of their higher electron mobility. A heterojunction bipolar transistor (HBT) in said system is a vertical element, and therefore the period of its transmission can be controlled through the thickness of an epitaxial layer. Compared with high electron mobility transistors (HEMTs) of horizontal conductivity, HBTs are considered a better option since they are more likely to reach a high electric current and a high operating frequency. However, such elements have a very high defect rate due to the fabrication process. Generally, such elements need a mesa sidewall for support to avoid damage.
The current conventional process for fabricating a mesa sidewall is mainly applied to forming a surface insulation layer, coating passivation, enhancing mechanical strength, and so on. Therefore, not only does a film of the mesa sidewall have to grow isotropically, the mesa sidewall must have good insulation, a lower dielectric coefficient (reduced parasitic capacitance and inductance), good ability to fill up gaps, a low thermal expansion coefficient, and good surface coating effect. Current conventional methods for growing a dielectric sidewall are mainly plasma enhanced chemical vapor deposition (PECVD), inductively coupled plasma chemical vapor deposition (ICP-CVD), atomic layer deposition (ALD), and etc. Among them, PECVD has a good coating effect but ion bombardment would occur when the sidewall grows, which in turn increases leakage current in the element. ICP-CVD has a poor ability to fill up gaps and tends to form holes. ALD has a good ability to fill up gaps and a good surface coating effect; its drawback is slow growth, which slows down the overall fabrication speed.